Lattice Semiconductor announced the availability of three new I/O Breakout Boards: the MachXO 2280 Breakout Board, the ispMACH 4256ZE Breakout Board and the Power Manager II POWR1014A Breakout Board. Lattice Breakout Board Evaluation Kits offer a convenient way for users to accelerate hardware evalu...

Xilinx unveiled the Zynq-7000 family, an Extensible Processing Platform (EPP) developed to achieve the levels of processing and compute performance required in high-end embedded applications targeting markets such as video surveillance, automotive driver assistance, factory automation, and many othe...

Altera announced its portfolio of 28-nm devices. The company is providing customers clearly differentiated solutions across the new Cyclone V and Arria V FPGA families, the recently expanded Stratix V FPGA and previously announced HardCopy V ASIC families. With this 28-nm portfolio, Altera leverages...

Xilinx announced his stacked silicon interconnect technology for delivering breakthrough capacity, bandwidth and power savings using multiple FPGA die in a single package for applications that require high-transistor and logic density, as well as tremendous levels of computational and bandwidth perf...

Actel announced the availability of SmartFusion intelligent mixed signal FPGA reference designs targeting motor control applications. The reference designs, implemented in a single SmartFusion device, illustrate Field Oriented Control (FOC) using various feedback methods for permanent magnet synchro...

Actel announced the availability of the A2F500 Development Kit. The kit is supported by Actel’s Libero Integrated Design Environment (IDE), which includes SoftConsole Eclipse-based embedded software development environment.

The company also announced the production availability of SmartFusion A2...

KaiSemi provides customers with a full turnkey ASIC solution, selling fully compatible replacement chips. The process uses an in-house tool, which performs an automated conversion directly from the original FPGA netlist into a functionally-identical ASIC gate-level netlist.

Backed by a tier-one ...