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PLD/FPGA/ASIC/EDA ARCHIV

09. 10. 06 Automotive Grade AEC-Q100 certified CPLDs

Lattice Semiconductor announced that automotive versions of its ispMACH 4000Z CPLDs (Complex Programmable Logic Devices) have been characterized and qualified to meet the certification requirements of...

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02. 10. 06 Library with ARM PrimeCell Models and AXI Bus

VaST Systems Technology announced the availability of VaST models of the ARM PrimeCell PL080 DMA Controller, PL011 UART, PL190 Vector Interrupt Controller, PL131 Smart Card Interface, and the AMBA AXI...

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28. 09. 06 Display interface reference design

Lattice Semiconductor announced the availability of a free display interface reference design. It illustrates how to use the pre-engineered I/O components within its low cost LatticeECP2 and new Latti...

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26. 09. 06 ASIC Prototyping system for Tensilica Processors

SOC designers can now use ProDesign’s CHIPit ASIC Rapid Prototyping and Emulation systems to verify designs using Tensilica’s Diamond Standard processor cores. CHIPit verification platforms provide ve...

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25. 09. 06 Eva platform for DesignWare PCI Express IP

Synopsys and First Silicon Solutions (FS2), a division of MIPS Technologies, announced the availability of the Sitka evaluation and development platform for Synopsys' DesignWare PCI Express (PCIe) IP....

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21. 09. 06 Digital Receiver Board

Pentek released its GateFlow installed-core product Model 6821-422. Based on the model 6821 with 215 MHz A/D Converter VME with dual Virtex-II Pro FPGAs, it includes a factory-installed wideband digit...

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20. 09. 06 32-Bit embedded processor in open source format

Lattice Semiconductor announced the availability of the LatticeMico32, a 32-bit soft microprocessor optimized for Lattice Field Programmable Gate Arrays (FPGAs). Lattice is releasing the Hardware Desc...

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