Lattice will offer its customers a special edition of Aldec’s Active-HDL Designer Edition tools for FPGA design. The Active-HDL Lattice Designer Edition Lite supports mixed VHDL and Verilog simulation for Lattice’s FPGA devices, including the 90nm Extreme Performance LatticeSC family as well as the 90nm LatticeECP2M. In addition to mixed VHDL and Verilog RTL and Timing Simulation, Active-HDL Lattice Designer Edition Lite also will include Aldec’s HDL Text Editor, Language Assistant, State Machine Editor, Block Diagram Editor and other point tools in a single design workspace. Key debug capabilities such as Code Execution Tracing and Advanced Breakpoint Management also are included in the Lattice edition. Active-HDL Lattice Designer Edition Lite is available from Lattice now. The list price is $1249 for an annual node-locked license.