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DesignWare IP for PCI Express 11-06-08

Synopsys announced the availability of DesignWare IP for PCI Express with PCI-SIG Single Root I/O Virtualization (SR-IOV) technology. The PCI-SIG I/O Virtualization (IOV) technology, which builds on the PCI Express (PCIe) protocol stack, reduces the system hardware requirements by enabling the simultaneous sharing of peripherals across multiple CPUs or operating systems. By supporting the PCI-SIG IOV technology, the new DesignWare IP allows resources to be allocated more easily and efficiently, thus lowering power, improving performance and reducing overall costs in blade servers, storage and networking applications used in enterprise computing systems.

 

Synopsys offers a complete DesignWare IP solution consisting of digital controllers, PHY and verification IP, all of which fully support the PCI-SIG SR-IOV 1.0 specification. The DesignWare IP operates at 2.5 GT/s or 5.0 GT/s per lane and is fully configurable. It supports multiple Physical Functions (PF) and Virtual Functions (VF) such as Alternative Routing ID Interpretation (ARI), Function Level Reset (FLR), and Address Translation Services (ATS), providing designers with the ability to select the optimal feature set required for their target design. In addition, the IP preserves the existing DesignWare IP for PCI Express application interface, allowing easy integration of SR-IOV technology into a system on a chip (SoC).

 

The complete DesignWare IP for PCI Express solution with support for PCI-SIG SR-IOV is available immediately for early adopters, with general availability expected at the end of June.

 


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