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FPGA solution for PCI Express V1.1 06-03-07


Lattice Semiconductor announced the expansion of its PCI Express Intellectual Property (IP) core family within its ispLeverCORE portfolio. Lattice is adding a PCI Express x4 IP core solution, optimized for the LatticeECP2M FPGA family. The x4 version implements a single-chip PCI Express endpoint solution with integrated SERDES. The core and evaluation board both successfully passed testing against the PCI Express version 1.1 specifications at the February 2007 PCI-SIG workshop, ensuring that Lattice’s solution is interoperable with existing PCI Express-supported systems. The IP core will be supported by the IPexpress flow within Lattice’s ispLEVER 6.1 Service Pack 2, or later, design tool suite.

 

Lattice’s PCI Express x4 solution includes not only the IP core, but also an evaluation board, demonstration software and drivers. Demo drivers and API also are available for users who wish to extend the demo capabilities. Availability The LatticeECP2M PCI Express x4 solution will be production released later this month. Lattice’s PCI Express IP cores are supported in ispLEVER design tool suite version 6.1, Service Pack 2 or later. The PCI Express cores can be downloaded from the Lattice website at no charge for a time-limited evaluation within the IPexpress flow of the ispLEVER design tool. The LatticeECP2M device evaluation board is available now with a x4 PCI Express connector. Information about PCI Express IP cores, design tools, boards, demos and drivers can be found on the Lattice website.

 
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