Please click for enlarged view

KaiSemi provides customers with a full turnkey ASIC solution, selling fully compatible replacement chips. The process uses an in-house tool, which performs an automated conversion directly from the original FPGA netlist into a functionally-identical ASIC gate-level netlist.

Backed by a tier-one fab vendor, KaiSemi's automated conversion utilizes a database of multiple standard-cell fab process libraries. The range of libraries enables the conversion of any type and size of FPGA from any FPGA vendor to ASIC. This approach is accompanied by deep cost optimization during the automated conversion and allows the use of 3rd party standard hard cores (such as DDR interface, PCIe Phy, etc). The resulting ASICs – which are pin-compatible, timing-compatible, and functionally identical to the original FPGAs – consume less power and cost up to 70% less than their FPGA counterparts.

The team members originate in Flextronics-Semi's conversion division, where they specialized in VLSI, EDA and FPGA-to-ASIC gate array conversions.