Lattice Semiconductor announced the release of its PAC-Designer software design tool suite, version 4.99a. The tool suite now supports Lattice’s AECQ100-qualified automotive Power Manager II (LA-ispPAC-POWR1014/A) devices. The tool suite also provides design and verification support for all Power Manager and ispClock mixed signal devices. The Windows-based software enables implementation of a new power management algorithm in Lattice’s Power Manager II devices within minutes. Similarly, clock network designs require timing adjustments during the board debug phase. The ispClock devices support an in-system programmable skew mechanism. The PAC-Designer software is available now and can be downloaded free of charge from the Lattice website.