Xilinx announced availability of the 8.2 version of its PlanAhead hierarchical design and analysis software with support for its newest Virtex-5 LX family of 65nm FPGAs. PlanAhead 8.2 provides functionality to check limits for weighted average simultaneous switching output (WASSO) analysis. This new functionality allows designers to limit the amount of ground bounce present immediately at the output of the FPGA and prevent corruption of the operation of other devices driven by the FPGA. As a result, designers can effectively manage ground bounce on I/O banks for better signal integrity.

PlanAhead 8.2 extends the capabilities of the ExploreAhead design exploration utility to allow users to run multiple implementations with different floorplans of their design to achieve optimal results. These can be queued or optionally run in parallel when multiple processors are available. In addition, the ExploreAhead tool offers improved directory management, process management, and integration with the FPGA bitstream generation application in the ISE environment. Other PlanAhead 8.2 enhancements include improved management of physical constraints and viewing of the IO pin properties for a much more streamlined design exploration and floorplanning environment.

PlanAhead 8.2 is available on all major operating systems as an option to the Xilinx ISE design suite. Single-user licenses start at $5,995 US list and include training. Multiple user licenses and training packages are also available.