Cadence Design Systems announced the Cadence RF (Radio Frequency) Design Methodology Kit, targeted to address key challenges in wireless design. The Kit leverages the technologies from Cadence for intelligently managing parasitic extraction and linking system-level design with IC implementation, and accurately, yet rapidly, verifying complete wireless designs that span digital, analog and RF.

The kit includes an 802.11 b/g WLAN transceiver reference design, a full suite of RF verification IP, test plans, and applicability training on the RF design and analysis methodologies. The kit focuses on front-to-back RF IC design and addresses behavioral modeling, circuit simulation, layout, parasitic extraction and resimulation, and inductor synthesis. It also focuses on IC verification within a system context, leveraging system-level models and testbenches for use by designers in the IC environment. The Design Kit leverages accurate 3D extraction technology and advanced physical modeling capabilities from Assura™ RF, links to system-level environments, and key new functionality in the Virtuoso custom design platform with Flexible Balance option for calibrated results of transient and frequency analysis. The Virtuoso AMS Designer link to MATLAB and Simulink from The MathWorks is an example of a link to a key system-level design tool. The link to MATLAB and Simulink provides an executable specification that is continually elaborated throughout the development process. Thus, a common environment can be leveraged as IC designers verify against a system-level specification across multiple domains including system, digital, mixed-signal, and analog RF.

The announcement of the Cadence RF Design Methodology Kit follows on the heels of the Cadence AMS Methodology Kit and the Cadence Optimization Kit for ARM Processors, which Cadence announced at CDNLive! 2005.