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Stacking: 3D-SiP with 0.5 mm ball pitch 09-09-05

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Sharp developed a 0.5 mm ball pitch technology for 3D systems-in-package (3D-SiP). What has been very difficult to implement with SiP technologies is now possible: the stacking of DSP, Flash memory and SDRAM in one stack with 14 x 14 mm edge length and 1.7 mm in height. The bottom module contains the DSP on one substrate of 0.25 mm in height and fits into the gap created by the 0.5 mm ball pitch. The second module, which integrates one 32 Mbit Flash memory and one or two 256 Mbit SDRAMs, is placed on top of it. This means that logic and memory ICs only need 58 percent of the mounting surface, compared to the normal approach of placing the DSP and the memory (Flash and SDRAM) in two separate housing stacks.

 

Sharp will initially launch on the market two LSI systems (LR38683 and the LR38682) that are specifically designed for digital cameras in the 3-10 megapixel range. But manufacturers of mobile devices such as mobile phones and PDAs will also benefit from the new 3D-SiP technology because it facilitates the design-in of high performance LSI systems with the same space needs. Another advantage of the 3D-SiP technology is its far-reaching flexibility. Depending on the specific requirements of the application, the various modules (memory units or highly functional multi-pin circuits such as Logic ICs) can be combined in different configurations. Therefore, for digital cameras, the memory function can vary in accordance to the resolution of the CCD camera module. Samples of the two LSI systems, the LR38683 and the LR38682, are available immediately. Serial production is scheduled to start in July 2005.

 

 

 

 
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