| Altera announced the HardCopy II family, its second structured ASIC solution. HardCopy II devices are a solution for a broad range of ASIC and ASSP implementations. The devices deliver up to 2.2 million ASIC gates, 8.8 million bits of RAM, and over 350-MHz system performance. Altera offers the only structured ASIC development process with seamless migration from a pin-compatible, functionally equivalent FPGA prototype. Using the Quartus® II design software and the Stratix II FPGA family, designers can fully validate their design in system and at speed. They can also test-market features, and even develop multiple variations of a design, before committing to silicon. Once engineers finalize their design, the Quartus II design software automatically generates the files to handoff to Altera's HardCopy Design Center. The HardCopy Design Center performs a turnkey migration of the design to a HardCopy II structured ASIC and delivers fully tested prototypes in 8 to 10 weeks. Designers have the option to use their existing synthesis, verification, timing analysis, and logic equivalency checking tools from Cadence, Mentor Graphics, Synopsys, and Synplicity. HardCopy II devices deliver core power reduction from the design implemented in the Stratix II FPGA. Its interface circuitry supports external memory at 233MHz for SDRAM and 250MHz for RLDRAM II. Additionally, HardCopy II devices also support 1-Gbps differential I/O and high-speed interfaces, including 10-Gigabit Ethernet (XSBI), SFI-4, SPI4.2, HyperTransport(TM), RapidIO(TM), and UTOPIA Level 4 interfaces up to 1 Gbps. The devices are manufactured on TSMC's 90-nm process with low-k dielectric, the same process as the Stratix II FPGA family. Designers can immediately begin prototyping their HardCopy II designs on a Stratix II FPGA using Quartus II version 4.2 design software. Customer prototypes of the first HardCopy II device will be available in the third quarter of 2005. The HardCopy II family has five members ranging in density between 1 million and 2.2 million ASIC gates. Volume pricing at 100,000 units starts at $15, with NREs starting at $225,000 for a full turnkey migration, including delivery of fully tested prototypes.
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