Synopsys has completed the acquisition of nSys Design Systems Private Limited (nSys), an independent provider of verification IP (VIP). With this acquisition, Synopsys is increasing its investment in VIP technology to address the growing verification challenges designers face as they create more and more complex systems on chips (SoCs) to serve the demand for 'smart' electronics. The terms of the deal, structured as an acquisition of substantially all the assets and employees of nSys, have not been disclosed.

nSys offers Verification IPs for standard interfaces/ protocols such as PCIe 3.0/ 2.0/ 1.0, PCI-X, PCI, SR-IOV, Ethernet (100/ 40/ 10/ 1G), Interlaken, USB 3.0/2.0, SATA 3.0, SAS 3.0, ATAPI, AXI, APB, AHB, DDR3/2. Each nVS consists of BFM, Monitors, Assertion-based Checkers and Test Suites for Compliance Testing & Functional Coverage.

All nVS are available in native SystemVerilog (OVM/ VMM) & Verilog, with option of Source Code. nVS family of VIPs is integrated to work with popular languages, like ‘e’, SystemC, OpenVera and VHDL, on all commonly used simulators and platforms. nSys also offers Verification Services like Independent Verification Services, SystemVerilog Migration and Verification.