Cadence introduced PowerMeter functionality that extends its dynamic power rail analysis solution. PowerMeter enables design teams to accurately calculate and distribute leakage, internal and switching power consumption for every instance of their design. When used with the Dynamic Gate (DG) option to the market-leading VoltageStorm power analysis solution, PowerMeter calculates the distributed dynamic power used to drive the dynamic rail analysis of a design.
This analysis determines the impact of voltage (IR) drop transients on the power and ground rails of a design. Designers can use this information to optimize their power routing widths and the size and location of de-coupling capacitors used to tame IR drop transients, gaining confidence that IR drop will not cause silicon failure.
As an integral part of a comprehensive timing analysis flow that is both SI and IR-drop aware, VoltageStorm DG works with Fire & Ice QXC parasitic extraction and CeltIC Nanometer Delay Calculator (NDC) SI-aware delay calculator to enable dynamic timing analysis and noise analysis results that more closely match silicon. VoltageStorm DG creates instance-based operating voltage information read by CeltIC NDC, which then accounts for the reduced operating voltages during both timing and noise analysis.
